A Translation-based Approach to the Verification of Modular Equivalence

In this paper, a method for verifying the equivalence of logic program modules under a Gaifman-Shapiro-style module architecture is proposed. The idea is to adapt a translation-based verification technique, which was originally devised for complete programs only, for program modules. In addition, optimization strategies are addressed in order to exploit the modular structure of programs in verification tasks. A number of experiments on verification strategies are also conducted using LPEQ which implements the verification method for the SMODELS system. Preliminary results indicate that at least in certain cases the overall time spent on verification tasks can be reduced through modularization.